Course examination 29.4.2009 : criteria of evaluation


1. Lyhyesti / Briefly (12p)

a) Bus using synchronous vs asychronous timing (pp. 81-82)

- synchronous uses clock pulse to time signals, (slowest determines the speed)
- asychronous has no fixed speed, based on signaling without time
information, speed negotiation  (often the target device needs to make separate
bus reservation later when the reply is ready)
+ mentioning issue on pace, duration, speed (or something similar)

b)multiplexing (pp.80, 84-88)

- same lines used for different purposes in different times  (data/
address)
-PCI-bus example: data/address; command/byte enable

( I did not accept the answer: different initiators use for different
purposes or different commands)


c) hardwired vs microprogrammed control (pp.591-606)

both control the instruction execution.
in hardwired changes need redesign, but it works fast
in microprogrammed control changes just require the change in the
firmware, the underlying hadware does not change. The program execution
makes it work slower.
Hardwired suitable for reduced instruction sets, larger sets makes the
logic very complex to implement directly in circuits.

(Minimum requirement two differences)


d) horizontal and vertical microinstructions (pp. 598-624)

In horizontal each signal is represented with one bit in each
microinstruction
In vertical the the operations are coded to smaller bit sequence

(1p each and one for the comparation like speed or
implementation)

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2. Välimuisti / Cache (10 p)   Book Chapters 4 and 8.3

a) cache and TLB. Explanation and comparation (4p)
1/2 p cache explanation
1/2 p TLB explanation
1 p similarities /differences
1p function together

b) two-way cache example  

similar to the exercise question 5 in exercise 3.

Calculation 1 p
Address split 2p
Diagram 1-2 p
Explanation 1-2 p

Mixing the order of tag, set and line  was -2 p
Using word addressing instead of byte addressing was -1 p

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3. Riippuvuudet /Dependencies (10 p) /Liisa Marttinen

There are 5 different dependencies (Stallings (2 ed.), pp. 508-520)
* true data dependency (write-read dependency, read after write
   dependency, flow dependency)
* procedural dependency
* resource dependency
* output dependency (write-write dependency, write after write
dependency)
* antidependency (read-write dependency,  write after read dependency

2  points for each dependency
    ? p  name
    ? p  problem description
    ? p  code example
    ? p  how to avoid  or reduce the effect
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4. Piirit/ Circuits (10 p) /Liisa Marttinen

Truth tables, SOP forms and Karnaugh maps are explained in Stallings
(2 ed.) pp. 699-705.

a)Truth table    3 p
   correct truth table 3 p, with some mistakes 2 p, something
    that looks like a truth table 1 p
   Almost all who gave some answer gave a correct truth table.

b)SOP form      3 p
  correct 3p, with some mistakes 2 p, some idea about SOP form 1 p
  With POS form  you didn't get any points.
  Also here answers were mostly correct  and resulted 3 p

c)Karnaugh map and simplest possible SOP form for z2 (4 p)
   Karnaugh map  + the simplest  form  for  z2  (z2= x2)  4 p
   This you get exploiting  the ?don't care? conditions.
   Karnaugh map + a simple form for z2 (z2 = (not)x1 x2) 2 p