> I'm actually writing support for the PAT as we speak. I already have
> working code for PAT setup. Just having a parameter for ioremap is not
> enough, unfortunately. According to the Intel Architecture Software
> Developer's Manual we have to remove all mappings of the page that are
> cached. Only then can they be mapped with per page write combining. I
> should have working code by the 2.5.x timeframe. I can also discuss the
> planned interface if anyone is interested.
I'm interested. Would it be possible to port this support to 2.2, or would
that be too much work?
-- Timur Tabi - ttabi@interactivesi.com Interactive Silicon - http://www.interactivesi.comWhen replying to a mailing-list message, please direct the reply to the mailing list only. Don't send another copy to me. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org Please read the FAQ at http://www.tux.org/lkml/