What's the purpose of of the irq_2_pin in io_apic.c?
I assume that I overlook something, but afaics the code allows one
physical interrupt source (e.g. INTA from device 9 on pci bus 0) to
arrive at multiple ioapic pins.
Can that happen, is that important?
Silly question: Why can't we ignore all but the first pin? If we don't
enable the additional pins, we don't have to disable them during
disable_irq() and enable_irq() seem to be the only users of irq_2_pin.
Btw, is is correct that the isa irq's are always connected to the first
io apic? find_isa_irq_pin() doesn't handle that, and the caller just
access io apic 0.
-- Manfred - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to email@example.com Please read the FAQ at http://www.tux.org/lkml/