> On 12 Feb 2001, Jes Sorensen wrote:
>> In fact one has to look out for this and disable the feature in some
>> cases. On the acenic not disabling Memory Write and Invalidate costs
>> ~20% on performance on some systems.
> And in another message, On Mon, 12 Feb 2001, David S. Miller wrote:
>> 3) The acenic/gbit performance anomalies have been cured
>> by reverting the PCI mem_inval tweaks.
> Just to be clear, acenic should or should not use MWI?
> And can a general rule be applied here? Newer Tulip hardware also
> has the ability to enable/disable MWI usage, IIRC.
And so do eepro100 and starfire. On the eepro100 we're enabling MWI
unconditionally, and on the starfire we disable it unconditionally...
I should probably take a look at acenic's use of PCI_COMMAND_INVALIDATE
to see when it gets activated. Some benchmarking would probably help,
too -- maybe later today.
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