Re: Via chipset

Bryan O'Sullivan (bos@serpentine.com)
15 Aug 2001 14:50:55 -0700


a> Actually I've talked to a VIA person about it - the problem is I
a> don't have clean concrete repeatably way to generate the problem
a> and generate it rapidly.

Right. The closest I've come to a reproducible setup is "keep the PCI
bus very busy and hope for the best". This yields roughly 1 bad byte
read out of 150 million for stock 2.4.7, or 1 per 400 million for
2.4.8-ac3.

With error rates like this, it's not likely to be easy to find.

<b
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