Re: APIC revisited

Keith Owens (kaos@ocs.com.au)
Tue, 02 Oct 2001 12:01:33 +1000

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On Mon, 01 Oct 2001 18:56:16 -0400,
"Rinaldi J. Montessi" <rinaldij@adelphia.net> wrote:
>I am of the impression that with the noapic parameter all calls are to
>be handled via CPU0, yet I am getting several errors on CPU1 as well.

noapic only affects external internal interrupts. Inter processor
interrupts (IPIs) always use the APIC bus. Ix86 SMP does a lot of
IPIs.

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Next message: Robert Love: "Re: [PATCH] Intel 830 support for agpgart"
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Maybe in reply to: Rinaldi J. Montessi: "APIC revisited"