Re: Athlon Optimization Problem

Daniel Nofftz (nofftz@castor.uni-trier.de)
Tue, 29 Jan 2002 09:07:51 +0100 (CET)


On Mon, 28 Jan 2002, Calin A. Culianu wrote:

> Hmm. What do you recommend? I remember seeing a spec sheet and register
> 0x95 was the memory write queue timer.. but I could have dreamed it..
>
> Anyone know what register 0x95 does?

hmmm ... when i was working on the athlon disconnect patch i found that
the pcr files (resorce files) for the wpcredit programm (windows tool for
changing the configuration of chipset) are a good source of information.
but this register isn't discribed in this file ... sorry

daniel
(i placed the pcr file on the web, if you are interested, have a look at:
http://cip.uni-trier.de/nofftz/linux/kt266_pcr.txt ... the webserver is
down at the moment, but should be up again in 1-2 hours)

# Daniel Nofftz
# Sysadmin CIP-Pool Informatik
# University of Trier(Germany), Room V 103
# Mail: daniel@nofftz.de

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