Re: SMP P4 APIC/interrupt balancing

James Bourne (jbourne@MtRoyal.AB.CA)
Wed, 17 Apr 2002 14:02:05 -0600 (MDT)


On Wed, 17 Apr 2002, Ingo Molnar wrote:

>
> On Wed, 17 Apr 2002, James Bourne wrote:
>
> > Where would I find this separate patch? Is there something I could do
> > some testing on?
>
> the timer irq inbalance problem should be solved by the attached patch.

Thanks Ingo,
That has balanced the timer irqs. I've also enabled hyper threading
(append="acpismp=force").

Here's the output from /proc/interrupts:
brynhild:bash$ cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
0: 3033 2911 2871 2880 IO-APIC-edge timer
1: 1 0 2 0 IO-APIC-edge keyboard
2: 0 0 0 0 XT-PIC cascade
8: 1 0 0 0 IO-APIC-edge rtc
18: 5 3 3 4 IO-APIC-level aic7xxx
19: 480 421 412 529 IO-APIC-level eth0
20: 5 3 4 4 IO-APIC-level aic7xxx
21: 5 3 4 4 IO-APIC-level aic7xxx
27: 588 1010 654 943 IO-APIC-level megaraid
NMI: 0 0 0 0
LOC: 11530 11528 11528 11466
ERR: 0
MIS: 0

And, you've gotta like this line:
Total of 4 processors activated (14299.95 BogoMIPS).

I'm going to do some testing on it to check it's stability.
I'll let you know the results.

Thanks again and regards,
James

>
> Ingo
>

-- 
James Bourne, Supervisor Data Centre Operations
Mount Royal College, Calgary, AB, CA
www.mtroyal.ab.ca

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