Re: [reiserfs-dev] Re: IDE problem: linux-2.5.17

Vojtech Pavlik (vojtech@suse.cz)
Fri, 24 May 2002 15:20:54 +0200


On Fri, May 24, 2002 at 02:15:30PM +0200, Martin Dalecki wrote:
> Użytkownik Vojtech Pavlik napisał:
> > On Fri, May 24, 2002 at 01:03:26PM +0200, Martin Dalecki wrote:
> >
> >>Użytkownik Vojtech Pavlik napisał:
> >>
> >>
> >>>>Hmm thinking again about it... It occurrs to me
> >>>>that actually there should be a mechanism which tells the
> >>>>host chip drivers whatever there are only just one or
> >>>>two drivers connected. I will have to look in to it.
> >>>
> >>>
> >>>There is no such mechanism (except for probing the drives). IDE has
> >>>quite nonsensical "split" termination - the termination resistors are
> >>>always present even on the middle device. This is to "simplify" things
> >>>...
> >>>
> >>
> >>Yes there is the host chip timer setting is basically
> >>changing the termination properties on the hsot chips part
> >>of the connection. This is the reason I was thinking
> >>that making the driver for it know how many drivers
> >>are attached to it could make some sense.
> >
> >
> > Hmm, interesting. Is it on all chips or just some? I don't know about
> > anything like that on Intel, VIA, nVidia, AMD, SiS and Artop controllers ...
>
> Hey what I'm talking about is the "physics" of the hardware.
> But I would rather expect sane hardware to deal with it transparently
> to the programmer of the setup registers.

Well, when I hear "timer" I think "engineering", not "physics". And a
timer would have to be visible somewhere. I really don't think the
controller can tell how many drives it sees unless it measures the
termination resistance or somesuch.

-- 
Vojtech Pavlik
SuSE Labs
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/