If we examine Table 2-3 of the Retired SFF-8038i rev 1.0 the only document
to describe the behaviors of Bus Master IDE Status Register.
It is a R/W field.
Bit 7: Simplex RO
Bit 6: Device 1 DMA Capable RW
Bit 5: Device 0 DMA Capable RW
Bit 4: Reserved "MUST RETURN ZERO ON READS" !!! Vendor Write
Bit 3: Reserved "MUST RETURN ZERO ON READS" !!! Vendor Write
Bit 2: Bus Master Interrupt STATUS R Clear W
Bit 1: Bus Master Error STATUS R Clear W
Bit 0: Bus Master Active STATUS
Vendor Write, is not a published or listed techincal term.
It is me trying to present this clearly enough so that the masses will see
how poorly the general understanding of the basics in 2.5.
Not to worry, I am sure UnderDog will come an save the day soon enough.
LAD Storage Consulting Group
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