--==_Exmh_1619018740
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torvalds@transmeta.com said:
> The gdt descriptor alignment really shouldn't matter, but that bogus
> GDT _size_ thing in the descriptor might do it.
I knowit shouldn't, all I can say is that it does for me.
> Right now it's set to be 0x8000, which is not a legal GDT size (it
> should be of the form n*8-1), and is nonsensical anyway (the comment
> says 2048 entries, but the fact is, we don't _have_ 2048 entries in
> there).
I fixed this as part of my cleanups, but it doesn't actually make a difference
to the voyagers. What kills them is either gdt not 8 bytes aligned in setup.S
or %cs above about 0x30 when going from real to protected mode (once in
protected mode, it will happily accept arbitrary descriptor values).
The attached patch should fix all of the issues in this thread
- Align boot time GDT on 16 byte boundary (per intel recommendation)
- Use minimal boot time GDT and switch to complex one after protected mode.
- intel recommended aligment of gdt_desc and idt_desc in boot/setup.S
- make the boot time gdt_desc have the correct length.
- intel recommended aligment of cpu_gdt_descr
- make cpu_gdt_table align exactly on a cache line
I really only care about the first two of these to boot my voyager systems,
but fixing all the others may help future proof us for later intel chips (at
least now we follow all of the intel guidelines).
James
--==_Exmh_1619018740
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You can import this changeset into BK by piping this whole message to:
'| bk receive [path to repository]' or apply the patch as usual.
===================================================================
ChangeSet@1.488, 2002-08-17 15:24:14-05:00, jejb@mulgrave.(none)
Alter Boot to use minimal GDT different from protected mode run time
GDT. Also correct a variety of aligment issues to be in line with
intel recommendations.
arch/i386/boot/compressed/head.S | 8 ++++----
arch/i386/boot/compressed/misc.c | 2 +-
arch/i386/boot/setup.S | 26 ++++++++++++++++----------
arch/i386/kernel/head.S | 22 +++++++++++++++++-----
arch/i386/kernel/trampoline.S | 6 +++---
include/asm-i386/desc.h | 1 +
include/asm-i386/segment.h | 8 ++++++++
7 files changed, 50 insertions(+), 23 deletions(-)
diff -Nru a/arch/i386/boot/compressed/head.S b/arch/i386/boot/compressed/head.S
--- a/arch/i386/boot/compressed/head.S Sat Aug 17 15:26:52 2002
+++ b/arch/i386/boot/compressed/head.S Sat Aug 17 15:26:52 2002
@@ -31,7 +31,7 @@
startup_32:
cld
cli
- movl $(__KERNEL_DS),%eax
+ movl $(__BOOT_DS),%eax
movl %eax,%ds
movl %eax,%es
movl %eax,%fs
@@ -74,7 +74,7 @@
popl %esi # discard address
popl %esi # real mode pointer
xorl %ebx,%ebx
- ljmp $(__KERNEL_CS), $0x100000
+ ljmp $(__BOOT_CS), $0x100000
/*
* We come here, if we were loaded high.
@@ -101,7 +101,7 @@
popl %eax # hcount
movl $0x100000,%edi
cli # make sure we don't get interrupted
- ljmp $(__KERNEL_CS), $0x1000 # and jump to the move routine
+ ljmp $(__BOOT_CS), $0x1000 # and jump to the move routine
/*
* Routine (template) for moving the decompressed kernel in place,
@@ -124,5 +124,5 @@
movsl
movl %ebx,%esi # Restore setup pointer
xorl %ebx,%ebx
- ljmp $(__KERNEL_CS), $0x100000
+ ljmp $(__BOOT_CS), $0x100000
move_routine_end:
diff -Nru a/arch/i386/boot/compressed/misc.c b/arch/i386/boot/compressed/misc.c
--- a/arch/i386/boot/compressed/misc.c Sat Aug 17 15:26:52 2002
+++ b/arch/i386/boot/compressed/misc.c Sat Aug 17 15:26:52 2002
@@ -299,7 +299,7 @@
struct {
long * a;
short b;
- } stack_start = { & user_stack [STACK_SIZE] , __KERNEL_DS };
+ } stack_start = { & user_stack [STACK_SIZE] , __BOOT_DS };
static void setup_normal_output_buffer(void)
{
diff -Nru a/arch/i386/boot/setup.S b/arch/i386/boot/setup.S
--- a/arch/i386/boot/setup.S Sat Aug 17 15:26:52 2002
+++ b/arch/i386/boot/setup.S Sat Aug 17 15:26:52 2002
@@ -801,7 +801,7 @@
subw $DELTA_INITSEG, %si
shll $4, %esi # Convert to 32-bit pointer
# NOTE: For high loaded big kernels we need a
-# jmpi 0x100000,__KERNEL_CS
+# jmpi 0x100000,__BOOT_CS
#
# but we yet haven't reloaded the CS register, so the default size
# of the target offset still is 16 bit.
@@ -812,7 +812,7 @@
.byte 0x66, 0xea # prefix + jmpi-opcode
code32: .long 0x1000 # will be set to 0x100000
# for big kernels
- .word __KERNEL_CS
+ .word __BOOT_CS
# Here's a bunch of information about your current kernel..
kernel_version: .ascii UTS_RELEASE
@@ -1006,13 +1006,15 @@
# Descriptor tables
#
-# NOTE: if you think the GDT is large, you can make it smaller by just
-# defining the KERNEL_CS and KERNEL_DS entries and shifting the gdt
-# address down by GDT_ENTRY_KERNEL_CS*8. This puts bogus entries into
-# the GDT, but those wont be used so it's not a problem.
+# NOTE: The intel manual says gdt should be sixteen bytes aligned for
+# efficiency reasons. However, there are machines which are known not
+# to boot with misaligned GDTs, so alter this at your peril! If you alter
+# GDT_ENTRY_BOOT_CS (in asm/segment.h) remember to leave at least two
+# empty GDT entries (one for NULL and one reserved).
#
+ .align 16
gdt:
- .fill GDT_ENTRY_KERNEL_CS,8,0
+ .fill GDT_ENTRY_BOOT_CS,8,0
.word 0xFFFF # 4Gb - (0x100000*0x1000 = 4Gb)
.word 0 # base address = 0
@@ -1025,13 +1027,17 @@
.word 0x9200 # data read/write
.word 0x00CF # granularity = 4096, 386
# (+5th nibble of limit)
+gdt_end:
+ .align 4
+
+ .word 0 # alignment byte
idt_48:
.word 0 # idt limit = 0
.word 0, 0 # idt base = 0L
-gdt_48:
- .word 0x8000 # gdt limit=2048,
- # 256 GDT entries
+ .word 0 # alignment byte
+gdt_48:
+ .word gdt_end - gdt - 1 # gdt limit
.word 0, 0 # gdt base (filled in later)
# Include video setup & detection code
diff -Nru a/arch/i386/kernel/head.S b/arch/i386/kernel/head.S
--- a/arch/i386/kernel/head.S Sat Aug 17 15:26:52 2002
+++ b/arch/i386/kernel/head.S Sat Aug 17 15:26:52 2002
@@ -15,6 +15,7 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/desc.h>
+#include <asm/cache.h>
#define OLD_CL_MAGIC_ADDR 0x90020
#define OLD_CL_MAGIC 0xA33F
@@ -46,7 +47,7 @@
* Set segments to known values
*/
cld
- movl $(__KERNEL_DS),%eax
+ movl $(__BOOT_DS),%eax
movl %eax,%ds
movl %eax,%es
movl %eax,%fs
@@ -306,7 +307,7 @@
ENTRY(stack_start)
.long init_thread_union+8192
- .long __KERNEL_DS
+ .long __BOOT_DS
/* This is the default interrupt "handler" :-) */
int_msg:
@@ -349,12 +350,12 @@
.long idt_table
# boot GDT descriptor (later on used by CPU#0):
-
+ .word 0 # 32 bit align gdt_desc.address
cpu_gdt_descr:
.word GDT_ENTRIES*8-1
.long cpu_gdt_table
- .fill NR_CPUS-1,6,0 # space for the other GDT descriptors
+ .fill NR_CPUS-1,8,0 # space for the other GDT descriptors
/*
* This is initialized to create an identity-mapping at 0-8M (for bootup
@@ -405,10 +406,21 @@
*/
.data
-ALIGN
/*
* The Global Descriptor Table contains 28 quadwords, per-CPU.
*/
+#ifdef CONFIG_SMP
+/*
+ * The boot_gdt_table must mirror the equivalent in setup.S and is
+ * used only by the trampoline for booting other CPUs
+ */
+ .align L1_CACHE_BYTES
+ENTRY(boot_gdt_table)
+ .fill GDT_ENTRY_BOOT_CS,8,0
+ .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
+ .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */
+#endif
+ .align L1_CACHE_BYTES
ENTRY(cpu_gdt_table)
.quad 0x0000000000000000 /* NULL descriptor */
.quad 0x0000000000000000 /* 0x0b reserved */
diff -Nru a/arch/i386/kernel/trampoline.S b/arch/i386/kernel/trampoline.S
--- a/arch/i386/kernel/trampoline.S Sat Aug 17 15:26:52 2002
+++ b/arch/i386/kernel/trampoline.S Sat Aug 17 15:26:52 2002
@@ -56,7 +56,7 @@
lmsw %ax # into protected mode
jmp flush_instr
flush_instr:
- ljmpl $__KERNEL_CS, $0x00100000
+ ljmpl $__BOOT_CS, $0x00100000
# jump to startup_32 in arch/i386/kernel/head.S
idt_48:
@@ -69,8 +69,8 @@
#
gdt_48:
- .word 0x0800 # gdt limit = 2048, 256 GDT entries
- .long cpu_gdt_table-__PAGE_OFFSET # gdt base = gdt (first SMP CPU)
+ .word __BOOT_DS + 7 # gdt limit
+ .long boot_gdt_table-__PAGE_OFFSET # gdt base = gdt (first SMP CPU)
.globl trampoline_end
trampoline_end:
diff -Nru a/include/asm-i386/desc.h b/include/asm-i386/desc.h
--- a/include/asm-i386/desc.h Sat Aug 17 15:26:52 2002
+++ b/include/asm-i386/desc.h Sat Aug 17 15:26:52 2002
@@ -13,6 +13,7 @@
struct Xgt_desc_struct {
unsigned short size;
unsigned long address __attribute__((packed));
+ unsigned short pad;
} __attribute__ ((packed));
extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
diff -Nru a/include/asm-i386/segment.h b/include/asm-i386/segment.h
--- a/include/asm-i386/segment.h Sat Aug 17 15:26:52 2002
+++ b/include/asm-i386/segment.h Sat Aug 17 15:26:52 2002
@@ -69,6 +69,14 @@
#define GDT_SIZE (GDT_ENTRIES * 8)
+/* Simple and small GDT entries for booting only */
+
+#define GDT_ENTRY_BOOT_CS 2
+#define __BOOT_CS (GDT_ENTRY_BOOT_CS * 8)
+
+#define GDT_ENTRY_BOOT_DS (GDT_ENTRY_BOOT_CS + 1)
+#define __BOOT_DS (GDT_ENTRY_BOOT_DS * 8)
+
/*
* The interrupt descriptor table has room for 256 idt's,
* the global descriptor table is dependent on the number
===================================================================
This BitKeeper patch contains the following changesets:
+
## Wrapped with gzip_uu ##
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end
--==_Exmh_1619018740--
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