>Read e.g. ATA-6.
> [If things work well, they may well be fast. But you are only entitled
> to conclude that something is wrong after waiting for 31 s. In
> particular, if you want to detect device 1 (the slave device), then
> only after 31 s you know that it is absent.]
We're only talking about going fast if we detect that things have gone well.
>See for example the Device power-on or hardware reset state diagram in 9.1.
Thanks for the reference. Pointing to the actual standards
makes these discussions a lot more efficient.
What I said to Andre about software reset also apparently
applies to hardware reset.
The state diagram that you refer to for hardware reset is on
page 312 of ATA/ATAPI-6 revision 3b, 28 February 2002 and
page 85 of ATA/ATAPI-7 revision 0d, 8 July 2002. As with
software reset, BSY is asserted within 400ns of reset being asserted
and remains set until the transition at the end of the diagram
(D0HR3:Set_Status --> Device_idle_S).
So, I think that Eric Biederman's suggestion about waiting for
BSY to clear, so as to accomodate Power On Self Test that can complete
in under 31 seconds should be OK.
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