weird semantics of cpu/*/msr

[Martin Waitz]

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hi :)

the i386 msr driver is a bit strange:

* when reading/writing, it does not update the file position/msr register
* file position is used directly as msr register

that is, reads with count>8 do read from the same register multiple
times, and writes overwrite themselves.

i would expect the following semantics:
* file position is (msr register * 8). position%8!=3D0 is invalid
* read/write updating file position.

that would make it possible to write/read multiple MSRs with one
syscall, which is very handy when initializing P4 performance counters.

should i implement that behaviour?
of course it would break binary compatibility with existing
uses of that drivers.
perhaps we would need a new location for the new api.

comments?

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