Re: 2.4.21-pre2: CPU0 handles all interrupts

Ron Cooper (
Sun, 29 Dec 2002 21:30:07 -0600

On Sunday 29 December 2002 07:35 pm, Alan Cox wrote:
> On Sat, 2002-12-28 at 17:03, Ron Cooper wrote:
> > Mine does this too. 2.4.20. Iwill dp400 board running dual
> > 2.4Ghz Xeons with HT enabled.
> >
> > I have to boot by passing "noapic" to the kernel, otherwise
> > /cat/proc/interrupts will show the interrupt numbers wrong,
> > however. not doing this changes nothing.
> "noapic" will deliver all IRQ's to IRQ0. Note btw - IRQ numbers
> *do* change in APIC mode
> -

Thank you for your reply and for the information.

Any reason to be disturbed by the fact /proc/interrupts only shows
CPU0 with irq counts while CPU1 is always zero?

All the VIA chipsets I have that are SMP report both CPU's in the
interrupt counts. This IWILL board with the I860 chipset does not
no matter which kernel I try.

I'd like to fix this but I dont know how. But I am willing to
assist and devote any time necessary to someone who may have the
knowledge fix it. There have to be others out there experiencing
this same issue so its not a wasted cause in my estimation.

Alan, do you have any commentary on this issue?



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