Now I think that would be bad as that would mean waiting in the normal
case. But if you look at the various access patterns, I think there is
no real problem in fact, though I beleive only Andre can confirm.
We have 3 cases to deal with:
1 - Command with no data transfer. Here, there should be no problem
just doing a read from status or alt_status, right ? now, reading status
might clear the IRQ if we are slow enough, so we may want alt_status
instead. (We can probably safely ignore controllers that have no alt
status here, or route them via some hwif->IOSYNC() macro). Or maybe just
re-read the select register for making everybody happy.
2 - Command with a data transfer not using DMA (that is either PIO or
the command part of an ATAPI command in ide-cd). I don't think there's
any problem reading alt status or select here, is there andre ? So we
can also safely do that before waiting and thus make sure the bus path
to the controller is ok
3 - Command with a data transfer using DMA (new ide-scsi, ide-hd with
dma, etc...). Here, I beleive there is just no problem, we don't need to
wait at all, since the interrupt handler will check for the DMA
controller to have completed via hwif->ide_dma_test_irq before reading
the status reg at all, right ?
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