GDT at c0306300, 32 entries:
GDT# 12: base:00000000 limit:ffffffff flags:c09b <P:1 DPL:0 32-bit Code>
GDT# 13: base:00000000 limit:ffffffff flags:c093 <P:1 DPL:0 RW Data>
GDT# 14: base:00000000 limit:ffffffff flags:c0fb <P:1 DPL:3 32-bit Code>
GDT# 15: base:00000000 limit:ffffffff flags:c0f3 <P:1 DPL:3 RW Data>
GDT# 16: base:c0353800 limit:000eb flags:008b <P:1 DPL:0 Busy TSS>
TSS at c0353800, 236 bytes:
CS:0000 <GDT#00,RPL0> EIP:00000000 eflags:00000000
SS0:0068 <GDT#13,RPL0> ESP0:c2806000
SS:0000 <GDT#00,RPL0> ESP:00000000
DS:0000 <GDT#00,RPL0> ES:0000 <GDT#00,RPL0>
FS:0000 <GDT#00,RPL0> GS:0000 <GDT#00,RPL0>
LDT:0011 <GDT#02,RPL1> CR3:00000000
^^^^ ^^^^^^^^
The LDT in the kernel's TSS is wrong -- it's shifted right by three
bits and should be 0088 <GDT entry #17, RPL 0>
And shouldn't CR3 be intitialized in case anyone actually wants to
switch back to the kernel TSS?
------
Chuck
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