Re: Test Patch: 2.5.69 Interrupt Latency

Alan Stern (stern@rowland.harvard.edu)
Thu, 15 May 2003 17:07:42 -0400 (EDT)


On 15 May 2003, Paul Fulghum wrote:

> I have a question about the wakeup_hc() code in general:
>
> when waking in response to a resume event,
> the current code sets the USBCMD_FGR (force global resume)
> and USBCMD_EGSM (enter global suspend mode) bits,
> waits 20ms and clears both bits to start sending EOP signal.
>
> According to the datasheet, the controller itself
> (not software) sets the FGR bit on detection of
> a resume event. 20ms after the USBSTS_RD indication,
> software should clear both the FGR and EGSM bits.
>
> My reading of this is that the line:
>
> outw(USBCMD_FGR | USBCMD_EGSM, io_addr + USBCMD);
>
> before the 20ms wait should not be necessary.
>
> Am I reading this correctly?

I interpret it the same way as you. I tried removing that line from the
driver, and it continued to work just fine. So it looks like you are
right.

Alan Stern

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