> Hi Dave. This is the output from my Celeron 600A system -- it's a tiny bit
> different from what others posted to the list (an 0x86 instead of an 0x87).
> My understanding is that this CPU has half the L2 cache of the "real"
> Pentium M. Hope this is helpful and not annoying.
Yeah, I'd realised that was also missing. I'll get it in sync with 2.5
after Marcelo makes a 2.4.21
> Also, a question: I had
> assumed that the lack of info in /proc/cpuinfo was simply that an
> informational problem, and that the cache is actually working. Am I
> mistaken? (I.e. will having the kernel support this be a huge performance
> increase?) Thanks!
performance-wise, it may make a small difference on SMP systems, as it
affects the balancing of the scheduler. On UP, shouldn't be any difference.
Dave
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