Re: dcache-ac6-D - dcache threading

Andrey Savochkin (saw@saw.sw.com.sg)
Mon, 5 Jun 2000 19:50:43 +0800

On Mon, Jun 05, 2000 at 07:01:27PM +0800, Andrey Savochkin wrote:
> On Mon, Jun 05, 2000 at 06:37:43PM +0900, kumon@flab.fujitsu.co.jp wrote:
> > FYI: 1 CPU clock is 2.2ns@450MHz
> > lock aquire: if (test_and_set_bit(0, (void*)&sp->in_interrupt)) {
> > lock release: clear_bit(0, (void*)&sp->in_interrupt);
> >
> > Huum, "movb" instruction should be applied to exit-lock, again.
>
> You may remove this lock altogether. It's a pure debugging stuff.

Andrew Morton has called my attention to the locks.
Actually there are two "lock": atomic check for in_interrupt which is a
debugging stuff and isn't necessary. The second one is a spinlock (sp->lock)
guarding TX ring and the hardware command port. It is necessary, and I don't
see how it can be optimized.

Best regards
Andrey V.
Savochkin

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