Dr. Pan Hui is a candidate for a Professor position in Data Science and gives a teaching demonstration under title "Introduction to Instruction Pipelining Execution in Microprocessors" on Thursday 12.1.2017 at 13.00 in room C222 B222, Exactum.
This lecture is part of the undergraduate course Computer Architecture. Multi-cycle machine has improved the efficiency of single-cycle machine by allowing a single instruction to be executed in multiple CPU cycles and hence decoupling the CPU clock frequency from the worst case instruction execution time. Today, we will introduce the concept of pipelining that can further improve the instruction level parallelism.Pipelining enables faster CPU throughput (the number of instructions that can be executed in a unit of time) than would otherwise be impossible at a given clock rate. The basic instruction cycle is broken up into a series called a pipeline. Rather than processing each instruction sequentially (finishing one instruction before starting the next), each instruction is split up into a sequence of dependent steps so different steps can be executed in parallel and instructions can be processed concurrently (starting one instruction before finishing the previous one). Pipelining is fundamental for high performance microprocessor and the students are expected to master this concept.
Short Biography:
Pan Hui received his Ph.D degree from Computer Laboratory, University of Cambridge, and earned his MPhil and BEng both from the Department of Electrical and Electronic Engineering, University of Hong Kong. He is currently a faculty member of the Department of Computer Science and Engineering at the Hong Kong University of Science and Technology where he directs the HKUST-DT System and Media Lab (http://symlab.ust.hk). He is an adjunct Professor of social computing and networking at Aalto University Finland and also served as a Distinguished Scientist for Telekom Innovation Laboratories (T-labs) Germany until 2015. Before returning to Hong Kong in 2013, he has spent several years in T-labs and Intel Research Cambridge. He has published around 200 research papers with over 11,000 citations and has around 30 granted / filed European patents. He has founded and chaired several IEEE/ACM conferences/workshops, and has been serving on the organising and technical program committee of numerous international conferences including ACM SIGCOMM, IEEE Infocom, ICNP, SECON, MASS, Globecom, WCNC, ITC, IJCAI, ICWSM and WWW. He is an associate editor for IEEE Transactions on Mobile Computing and IEEE Transactions on Cloud Computing, and an ACM Distinguished Scientist.
Welcome!