A good point. The test results are inconclusive.
> And check the Pentium III erratas. There is one with the tlb
> that's only triggered if 4 instruction lie in a certain window and all
> access memory in the same way of the tlb (EFLAGS incorrect if 'andl
> mask,<memory_addr>' causes page fault)).
Nasty, but I don't see what an obscure and impossible to work around
processor bug has to do with this thread. It doesn't actually change
page fault handling, does it?
-- Jamie
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