What is most noticeable in this case is that all interrupts will be
handled by the first cpu.
On Tue, 2 Apr 2002, Tim Kay wrote:
> Hi all,
> Does anyone know what I'm actually losing with having to set noapic on
> bootup? I mean in real terms how much harder / slower is an SMP machine
> working when it's doing standard multi-bus xt polling compared to when it's
> in APIC poll state. I appreciate that there can be a reduction in interrupt
> response latency using the damn thing but is this a measurable amount given a
> machine processing about 1200 interrupts/sec? (this figure is a sum rather
> than per processor). As an added complication how do I get around interrupt
> routing conflicts in noapic mode and do the 'routing conflict for xx:xx:xx
> have X want Y' messages make any difference to this performance?
>
> A useful URL (I couldn't find any) or reference would suffice if this is too
> invloved or boring a topic to explain easily.
>
> TIA
>
> Tim
>
>
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