It has nothing to do with "buggy" PCI-PCI bridges, and everything to do
with the fact that a lot of bridges seem to extend on the official PCI
bridge interface in various ways. In particular, it seems to be fairly
common to have the _real_ bridging information in the chip-specific range
(PCI config area 0x40+) instead of in the official "2 mem resources, 2 IO
resources" place.
I think even some bog-standard Intel PCI bridge did exactly this. But all
my pdf files are at work right now.
Linus
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