> We can't actually use MMX/FPU instructions in the kernel in the general
> case. That would require saving and restoring the user process floating
> point state - which is extremely expensive
Yes, but that's not all that was implemented here.
# Prefetch support has been added to the Pentium III, Pentium 4, K6-2, K6-3, and Athlon series.
That's (as I understand it) independent from the floating point instructions.
Also, as a general point (IMO), targeting as specifically as possible (ie, K6-2 or K6-III rather than just K6) will most probably produce the best code for the processor. This also allows for later generations of compilers to make other optimizations and the kernel to take advantage of them.
David Bronaugh
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