Re: [0/4][via-rhine] Improvements

[Roger Luethi]

On Sat, 15 Feb 2003 16:49:24 -0500, Jeff Garzik wrote:
> I applied the patch, but I meant more that wait_for_reset seems 
> questionable.  There is generally a PIO or MMIO write preceding 
> wait_for_reset function call, and then the function delays.  If the PCI 
> write is posted, for example, which at least my own Via EPIA does, then 
> you cannot be guaranteed the timing of
> 	write[bwl]()
> 	udelay(5)
> 
> PCI writes must be flushed, by doing a read[bwl]().

Thanks for raising that issue. It is my understanding that PIO ops are
synchronous (on IA-32). If that is correct, problems should only occur if
the driver is built with MMIO support, no?

I have been building the driver without MMIO for quite a while to eliminate
one source of problems for now.

> what the exact handling is... and randomly placed udelay() calls are, 
> unfortunately, sometimes a sign of driver bugs instead of necessary 
> hardware delays.

You won't see me rule out driver bugs as a likely explanation for anything
anytime soon ;-).

> I would prefer both user and developer docs go in 
> Documentation/networking/via-rhine.txt.  It is easy enough to note 
> separate sections of the document...

ACK.

Roger