Re: [patch 2.5] PCI MWI cacheline size fix

[Dave Jones]

On Thu, Mar 20, 2003 at 01:59:50PM +0300, Ivan Kokshaysky wrote:
 > +
 > +	pci_cache_line_size = 32 >> 2;
 > +	if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
 > +		pci_cache_line_size = 64 >> 2;	/* K7 & K8 */
 > +	else if (c->x86 > 6)
 > +		pci_cache_line_size = 128 >> 2;	/* P4 */
 >  

I'd feel more comfortable with this with a c->x86_vendor == X86_VENDOR_INTEL
on the else if clause. The above code will silently break if for eg,
VIA, Transmeta or any other clone manufacturer make a model 7 or higher CPU.

		Dave