> > Using edge-triggered interrupts with sharing is a bad idea, no?
>
> PCI IRQ lines are level triggered
Even when /proc/interrupts says XT-PIC? I have uniprocessor
MPS 1.4 machines and build IO-APIC kernels for them because
I thought it was safer to share interrupts that way. The
four extra IRQ lines help, too. :)
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