Re: problem with Serverworks CSB5 IDE

[Duncan Laurie]

Alan Cox wrote:
> 
> The revision id is read when we init_chipset_svwks, which comes from the
> PCI setup. If the chip is in legacy mode we call init chipset early on
> regardless. If it is in native mode it gets called too and we ignore
> its view of the IRQ (since thats now PCI defined).
> 

Yeah I saw that after I hit send, but for serverworks the init_chipset
is not always called because it can fall into a corner case when in native
mode because the PCI interrupt pin register is hardwired to zero (don't
ask me why...) so it follows a codepath in do_ide_setup_pci_device()
where init_chipset isn't called.

This patch adds the function call, which fixes the svwks_revision
variable and the missing /proc/ide/svwks:

--- setup-pci.c~        2003-04-25 09:20:31.000000000 -0700
+++ setup-pci.c 2003-04-25 09:24:27.000000000 -0700
@@ -609,7 +609,7 @@
                 if (noisy)
                         printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
                                 d->name, pciirq);
-               pciirq = 0;
+               pciirq = (d->init_chipset) ? d->init_chipset(dev, d->name) : 0;
         } else {
                 if (d->init_chipset)
                         d->init_chipset(dev, d->name);

> 
>> 		/* Check the OSB4 DMA33 enable bit */
>> 		return ((reg & 0x00004000) == 0x00004000) ? 1 : 0;
>> 	} else if (svwks_revision < SVWKS_CSB5_REVISION_NEW) {
>>-		return 1;
>>+		return 2;
> 
> 
> Why this change ?
> 
> 

Because the max supported mode for CSB5 < rev 0x92 is udma 4 (=2),
not udma 2 (=1).

-duncan