> Break is *not* an asynchoronous event. (It means that the RX line has
> been pulled low for some period of time). The BI is only raised when
> the associated null character in the FIFO is revealed at the top of the
> FIFO. This is the standard behaviour defined by the 16550 UART, and any
> clones which gets this wrong are broken.
Thanks for the clarification. Certain chips handle it differently, for
example Zilog's 8530 asserts a BREAK interrupt as soon as a BREAK
condition is detected (regardless of other events), then when the BREAK
condition is removed it asserts a BREAK-deassert interrupt, after which a
null character is available (with a respective data interrupt).
-- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available +
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