Yliopiston etusivulle Suomeksi På svenska In English
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Department of Computer Science

Suomeksi In English Course Description 2010

581365-8 Computer Organization II (4 cu)
Tietokoneen rakenne
Datororganisation II

Position in Curriculum

Course is (elective) intermediate course in 1.8.2010 degree requirements and (elective) advanced course in 1.8.2005, 1.8.2006, 1.8.2007, and 1.8.2008 degree requirements.

The target audience for the course are the 2nd-4th year students.

Prerequisites

Course Computer Organization I, or the at least good knowledge on the topics in it.

Different Ways to Take This Course

One can take the course as

  1. Lecture course (one period)
    • Lectures: 6 weeks, 4h/wk
    • Practice sessions: 6 weeks, 2h/wk
    • Course exam
  2. Final exam

Please notice that the course exam for the lecture course can not be used as a final exam. Lecture course homework points do not affect your grade in the final exam.

All exams can be taken in English, but you need to confirm this with the instructor one week before the exam.

Course Material and Exam

The course (from Autumn 2010) is based on textbook William Stallings, Computer Organization and Architecture - Designing for Performance, 8th Ed., Prentice Hall, 2010. The course covers Chapters 3, 4, 5, 8.3, and 9-18.
(We assume that the Chapters 1-8 are mostly already known because of the prerequisites)

The final exam covers the material in the most recent lecture course.

Contents

  • Machine language structure and features
  • Logic circuits
  • Processor implementation: data path, control, memory, I/O
  • Principles of pipelining, basic hazards and solution methods for them
  • RISC, CISC, superscalar architecture, parallel processing, multicore computers
  • Memory hierarchy: caches, virtual memory and address translation logic
  • I/O buses: ISA, PCI, USB, SCSI

Learning Goals

We will cover lower level computer organization from circuit and logic level up to intruction set level, from the the user, compiler, or hardware architect viewpoint. The overall general goal is to understand how the hardware clock cycle will make the processor to execute instructions.

We will look at more detail instruction set structure and features, the (basics of) operation of logic and memory circuits, the components of processor implementation, the problematics with processor pipelining, as well as the implementation of memory hierarchy and I/O, also as related to parallel processing and multicore computers.

The learning goals are better described in their own document.

Teemu Kerola