--17484290-1024462970-980748200=:5509
Content-Type: TEXT/PLAIN; charset=US-ASCII
On Sun, 28 Jan 2001, Tim Hockin wrote:
>
> In reading the PIRQ specs, and making it work for our board, I thought
> about this. PIRQ states that link is chipset-dependant. No chipset that I
> have seen specifies what link should be. So, as this case demonstrates, it
> may be 'A' - the value the chipset expects, or 1, the logical index.
> Either one makes sense, assuming the PIRQ routing code knows what link
> means. Here we see two BIOS vendors/versions that apparently do it
> differently for the same chipset. Grrr.
They _may_ do the same thing for the same chipset, it's just that we don't
know exactly what that "same" thing is.
Ok, I want to see what people have. ANYBODY who has a SiS chipset, please
take 5 seconds to do this as root (yes, you need to be root):
dump_pirq | mail -s "dump_pirq" torvalds@transmeta.com
and I'm attaching the "dump_pirq" perl script here in this email so that
you don't even have to go to the bother of finding it on the net.
Oh, before you bombard me with email, please check that dump_pirq actually
prints out a PIRQ table. If it says
No PCI interrupt routing table was found.
followed by a router dump, it's not interesting, and I'd rather not get
a million of those particular emails, ok?
In fact, even if you don't have a SiS chipset, you could do the above. The
exception to that rule is if you have an Intel PIIX router, in which case
we pretty much _know_ that we do the right thing already.
(And _please_ don't make the subject line anything fancy. I want that
subject line to be "dump_pirq" and nothing else, ok?)
Linus
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